Chip Scale Packaging

Technology Dictionary -> Chip Scale Packaging

Chip Scale Packaging



(CSP) Surface Mount International attendees debated chip scale technologies as system manufacturers seek new levels of package miniaturisation for chip-on-board, flip chip and multichip modules. Technical and marketing gurus furthered the technical debate by focussing on which chip scale packaging schemes would be the most cost-effective for future packages designated for high volume consumer applications. Bare chip package supporters noted that mainstream circuitry is readily available in known good die (KGD) from a number of suppliers. Traditional ball grid array packages received strong support for current high volume and high density manufacturing needs. Chip scale packages (CSP) provide pre-speed-sorted,pre-tested and pre-packaged die without requiring specialized testing. CSP supporters improved their position with ChipScale's announcement that Motorola will license its Micro SMT packaging technology.

["Chip scale packaging gains at SMI. (Surface Mount International)", Bernard Levine, Electronic News (1991), Sept 4, 1995 v41 n2081 p1(2)].

[But what is it?]

(1996-07-09)


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